Integrated circuit devices, such as integrated circuit memory devices and integrated circuit logic devices, are widely used in consumer and commercial applications. Recently, Merged Memory and Logic (MML) integrated circuits have been developed. MML integrated circuits generally include a large capacity memory and a large logic block that are merged in one integrated circuit. Thus, an MML integrated circuit can replace discrete memory and logic chips that are used in personal computers and other consumer and commercial devices. MML devices are described, for example, in U.S. Pat. No. 5,848,016 to Kwak, entitled "Merged Memory and Logic (MML) Integrated Circuits and Methods Including Serial Data Path Comparing", and assigned to the assignee of the present application, the disclosure of which is hereby incorporated herein by reference.
It is known to use a silicide process to form low resistance contacts in integrated circuit memory devices including MML integrated circuit devices. In a silicide process, a refractory metal is reacted with exposed silicon areas thereunder to form a silicide. Following silicide formation, a selective etch may be used to remove the unreacted refractory metal without attacking the silicide. See for example U.S. Pat. No. 5,001,082 to Goodwin-Johannson entitled "Self-Aligned Salicide Process for Forming Semiconductor Devices and Devices Formed Thereby."
In manufacturing highly integrated memory devices including MML devices, it is known to form a silicide layer in the memory and in the logic block to reduce the contact resistance in both portions of the MML integrated circuit. It is also known that if the silicide layer is formed on the active region of the memory, junction leakage may increase which may thereby degrade the data storing ability of the memory. More specifically, in a Dynamic Random Access Memory (DRAM) device or an MML device that includes a DRAM, a silicide layer on the active region of the DRAM can increase the junction leakage of the memory cells, particularly where the storage node is formed. This leakage may degrade the data storing time of the capacitors of the DRAM which may increase the refresh requirements of the DRAM and/or decrease the reliability thereof.
In order to overcome this problem, it is known to form a silicide layer in the logic block of an MML integrated circuit but not in the memory block. It is also known to form a silicide layer in peripheral portions of an integrated circuit memory device but not in the memory cell array. Unfortunately, by not using silicide in the memory cell array, the contact resistance therein may increase.